1. Field of the Invention
The present invention relates to semiconductor packages and, more particularly to surface mount power semiconductor packages in which substantially all wire bonds from the semiconductor die to peripheral pad areas are directed to only one side of the package.
2. Related Art
Surface mount power semiconductor packages are known. These packages typically include a power semiconductor die disposed substantially at the center of a package and include a plurality of pads located at the periphery of the package. These pads are usually located around substantially all of the available peripheral area of the package or at least two sides of the package.
One or more wire bonds are disposed between metalized areas of the power semiconductor die to one or more of the peripheral pads. This provides input/output connections between electrodes of the package and the semiconductor.
It is desirable to utilize power semiconductor device packages exhibiting low total resistance, low thermal resistivity and high semiconductor die-to-package area ratios. Unfortunately, the prior art power semiconductor packages discussed hereinabove have not met each of these objectives at least because the large number of input/output pads disposed about the periphery the semiconductor package lowers the die to package area ratio. Package resistance and thermal conductivity also suffer when the input/output pads are disposed about the periphery of the package. These problems. are exacerbated when multiple semiconductor die arrangements are desired, irrespective of whether the multiple semiconductor dies are mounted within the same package or in separate packages.
Accordingly, there is a need in the art for a new semiconductor package which ameliorates the problems of the prior art discussed above.